Dynamic single phase logic with self-timed stages for power reduction in pipeline circuit designs

Frank Grassert, Dirk Timmermann. Dynamic single phase logic with self-timed stages for power reduction in pipeline circuit designs. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 144-147, IEEE, 2001. [doi]

@inproceedings{GrassertT01,
  title = {Dynamic single phase logic with self-timed stages for power reduction in pipeline circuit designs},
  author = {Frank Grassert and Dirk Timmermann},
  year = {2001},
  doi = {10.1109/ISCAS.2001.922191},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.922191},
  tags = {logic},
  researchr = {https://researchr.org/publication/GrassertT01},
  cites = {0},
  citedby = {0},
  pages = {144-147},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia},
  publisher = {IEEE},
  isbn = {0-7803-6685-9},
}