Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture

Murat Efe Guney, Kazushige Goto, Timothy B. Costa, Sarah Knepper, Louise Huot, Arthur Mitrano, Shane Story. Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture. In Neil Burgess, Javier D. Bruguera, Florent de Dinechin, editors, 24th IEEE Symposium on Computer Arithmetic, ARITH 2017, London, United Kingdom, July 24-26, 2017. pages 144-145, IEEE Computer Society, 2017. [doi]

Abstract

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