A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme

Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu. A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme. IEICE Electronic Express, 12(11):20150161, 2015. [doi]

@article{GuoDLW15,
  title = {A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme},
  author = {Song Guo and Yong Dou and Yuanwu Lei and Guiming Wu},
  year = {2015},
  url = {https://www.jstage.jst.go.jp/article/elex/12/11/12_12.20150161/_article},
  researchr = {https://researchr.org/publication/GuoDLW15},
  cites = {0},
  citedby = {0},
  journal = {IEICE Electronic Express},
  volume = {12},
  number = {11},
  pages = {20150161},
}