A Configurable FPGA Accelerator of Bi-LSTM Inference with Structured Sparsity

Shouliang Guo, Chao Fang, Jun Lin, Zhongfeng Wang. A Configurable FPGA Accelerator of Bi-LSTM Inference with Structured Sparsity. In 33rd IEEE International System-on-Chip Conference, SoCC 2020, Las Vegas, NV, USA, September 8-11, 2020. pages 174-179, IEEE, 2020. [doi]

@inproceedings{GuoFLW20,
  title = {A Configurable FPGA Accelerator of Bi-LSTM Inference with Structured Sparsity},
  author = {Shouliang Guo and Chao Fang and Jun Lin and Zhongfeng Wang},
  year = {2020},
  doi = {10.1109/SOCC49529.2020.9524784},
  url = {https://doi.org/10.1109/SOCC49529.2020.9524784},
  researchr = {https://researchr.org/publication/GuoFLW20},
  cites = {0},
  citedby = {0},
  pages = {174-179},
  booktitle = {33rd IEEE International System-on-Chip Conference, SoCC 2020, Las Vegas, NV, USA, September 8-11, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-8746-4},
}