A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction - researchr publication authors

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Yuekang Guo, Jing Jin 0005, Xiaoming Liu 0008, Jianjun Zhou. A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction. J. Solid-State Circuits, 58(2):474-485, February 2023. [doi]

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