A Phase-Coupled Compiler Backend for a New VLIW Processor Architecture Using Two-step Register Allocation

Jie Guo, Jun Liu, B. Mennenga, Gerhard Fettweis. A Phase-Coupled Compiler Backend for a New VLIW Processor Architecture Using Two-step Register Allocation. In IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2007, Montréal, Québec, Canada, July 8-11, 2007. pages 346-352, IEEE Computer Society, 2007. [doi]

Abstract

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