Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang, Huazhong Yang. From model to FPGA: Software-hardware co-design for efficient neural network acceleration. In 2016 IEEE Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August 21-23, 2016. pages 1-27, IEEE, 2016. [doi]
@inproceedings{GuoSQYHWY16-0,
title = {From model to FPGA: Software-hardware co-design for efficient neural network acceleration},
author = {Kaiyuan Guo and Lingzhi Sui and Jiantao Qiu and Song Yao and Song Han and Yu Wang and Huazhong Yang},
year = {2016},
doi = {10.1109/HOTCHIPS.2016.7936208},
url = {https://doi.org/10.1109/HOTCHIPS.2016.7936208},
researchr = {https://researchr.org/publication/GuoSQYHWY16-0},
cites = {0},
citedby = {0},
pages = {1-27},
booktitle = {2016 IEEE Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August 21-23, 2016},
publisher = {IEEE},
isbn = {978-1-5090-6208-9},
}