FPGA-Based Hardware Optimization for Low-Power High-Speed NLM Algorithms

Ruihang Guo, Tianyu Yan, Jiongyao Ye, Lianbo Wu. FPGA-Based Hardware Optimization for Low-Power High-Speed NLM Algorithms. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 150-154, IEEE, 2026. [doi]

Abstract

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