A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS

Subhanshu Gupta, Daibashish Gangopadhyay, Hasnain Lakdawala, Jacques C. Rudell, David J. Allstot. A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS. J. Solid-State Circuits, 47(5):1141-1153, 2012. [doi]

@article{GuptaGLRA12,
  title = {A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS},
  author = {Subhanshu Gupta and Daibashish Gangopadhyay and Hasnain Lakdawala and Jacques C. Rudell and David J. Allstot},
  year = {2012},
  doi = {10.1109/JSSC.2012.2185530},
  url = {http://dx.doi.org/10.1109/JSSC.2012.2185530},
  researchr = {https://researchr.org/publication/GuptaGLRA12},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {47},
  number = {5},
  pages = {1141-1153},
}