Optimizing Timing for Multi-bit Flip-Flop Intensive Designs Compatible with Commercial EDA Flow

Ilseon Ha, Taewhan Kim. Optimizing Timing for Multi-bit Flip-Flop Intensive Designs Compatible with Commercial EDA Flow. In 20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023. pages 347-348, IEEE, 2023. [doi]

@inproceedings{HaK23-0,
  title = {Optimizing Timing for Multi-bit Flip-Flop Intensive Designs Compatible with Commercial EDA Flow},
  author = {Ilseon Ha and Taewhan Kim},
  year = {2023},
  doi = {10.1109/ISOCC59558.2023.10396028},
  url = {https://doi.org/10.1109/ISOCC59558.2023.10396028},
  researchr = {https://researchr.org/publication/HaK23-0},
  cites = {0},
  citedby = {0},
  pages = {347-348},
  booktitle = {20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-2703-8},
}