Table of Contents

• GPU-Based Redundancy Analysis using Partitioning Method for Memory RepairYounwoo Yoo, Hayoung Lee, Seung-Ho Shin, Sungho Kang. 1-2 [doi]
• A Smith-Waterman Hardware Accelerator Design using Sliding Window for Genomic Sequence AlignmentJunhyuk Baik, Donghui Lee, Yongtae Kim. 1-2 [doi]
• Cryogenic Characterization of 40nm CMOS for Quantum Control ApplicationsAarthy Mani, Leong Xu Heng Victor, Anh-Tuan Do. 3-4 [doi]
• Embedded Solutions for IoT Based Automated Drug Infusion DeviceChiang Liang Kok, Zheng Yuan Loo, Jian Ping Chai. 5-6 [doi]
• Enhancing Stochastic Computing using a Novel Hybrid Random Number Generator Integrating LFSR and Halton SequenceDonghui Lee, Junhyuk Baik, Yongtae Kim. 7-8 [doi]
• Improved Accuracy of Stochastic Accumulator Using Low-Cost Bitonic SorterJaeeun Jeong, Jungeun Park, Woong Choi. 9-10 [doi]
• A COT-based Highly Efficient Hybrid 3-Level Buck Converter for Next-Generation Memory Module DesignsJi-Won Kim, Jeong Seop Lee, Kang-Yoon Lee. 11-12 [doi]
• 4-ch 25-Gb/s Small and Low-power VCSEL Driver Circuit with Unbalanced CML in 65-nm CMOSDaisuke Ito, Yasuhiro Takahashi, Makoto Nakamura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine. 13-14 [doi]
• An EEG Analog Front-End Unit for Wearable Applications Implemented in 28nm FD-SOIZayyir Ulric Cornelio, Paolo Resurreccion, Maria Theresa G. de Leon, Marc D. Rosales, John Richard E. Hizon. 15-16 [doi]
• A 94.3 % Peak Power Efficiency Time-Based Buck Converter Using Pulse-Phase-Shift Modes with An Intrinsic Window for Transient EnhancementTsung-Wen Sun, Chu-En Hsia, Tsung-Heng Tsai, Chia-Chan Chang. 17-18 [doi]
• A Digital LDO with Adaptive Loop Control and Reset-Voltage Optimization for ComparatorGwangmyeong An, Juneho Yoon, Taeho Kim, Hyunsu Jang, Myeongju Park, Bongsu Kim, Jongchan An, Junyoung Song. 19-20 [doi]
• A PRAM-based PIM Macro Using the Gilbert Multiplier-based Active Feedback and Input-aware SAR ADCSeongyeon Yu, Namwook Hur, Wansun Kim, Mann-Ho Cho, Hyunchul Sohn, Joonki Suh, Hongsik Jeong, Jong-Hyeok Yoon. 21-22 [doi]
• An Automatic Offset Compensation Sense Amplifier Featuring High Readout Reliability for SRAMShurun Li, Jie Liang, Liuyang Zhang. 23-24 [doi]
• A Small Area Cyclic Vernier Delay Line TDC Based ADDLL using Linear Delay InverterMan-Jae Yang, Goen Hoe Kim, Kang-Yoon Lee. 25-26 [doi]
• Time Controlled Pre-Emphasis Circuit for Broadband Frequency Operation up to 3.6 GbpsJunha Lee, Kang-Yoon Lee. 27-28 [doi]
• Alert Refresh System for Mitigating RowHammerNayeon Kim, Kwangrae Kim, Ki-Seok Chung. 29-30 [doi]
• A Pixel Driver Design Technique to Obtain a High-Quality Depth Map in Indirect Time-of-Flight SensorsJeongeun Song, Sunyoung Lee, Minseok Shin, Ohjun Kwon, Hansang Kim, Yujin Park, Gyubeom Hwang, Hyekyoung Jung, Hoesam Jeong, Changrock Song, Woo-seok Choi. 31-32 [doi]
• A GaN Driver IC With a TDC-Based Dead-Time Controller For GaN DC-DC Buck ConvertersYongseung Lee, Donghun Kim, Jongsun Kim. 33-34 [doi]
• A Neural Stimulator IC with Dynamic Voltage Scaling Supply and Energy Recycling for Cochlear Implant in Standard 180nm CMOS ProcessKim-Hoang Nguyen, Woojin Ahn, Minkyu Je, Quyet Nguyen, Quynh-Trang Nguyen, Thanh Tung Vu, Loan Pham-Nguyen. 35-36 [doi]
• A Dynamic Power Transistor-Based CL-LDO with Wide Load Range and -53 dB PSRR ImprovementYunam Jin, Ayeon Gwon, Minseo Kim, Jiwoo Noh, Woong Choi, Junwon Jeong. 37-38 [doi]
• High Bandwidth Efficiency FPGA-based Underwater Acoustic Transceiver with Adaptive-SFDR DDFSTzung-Je Lee, Hung-Hsiang Chang, Chien-Hsiang Chao. 39-40 [doi]
• Experimental Verification of Slow-Scale Oscillation in DC-DC Converter with Photovoltaic ModuleDaiki Hozumi, Shota Uchino, Takuji Kousaka, Hiroyuki Asahara. 41-42 [doi]
• 10 Gb/s Energy-efficient Optical Transceiver using 1060 nm HCG MEMS-tunable VCSEL in 28 nm FD-SOI TechnologyChristian A. Cortes, Jan Paolo S. Cortez, Juhaina Angela Q. Custodia, Kevin Mathew D. Reyes, Mariane D. Sta. Barbara, Maria Theresa Gusad de Leon, John Richard E. Hizon, Marc D. Rosales. 43-44 [doi]
• A picowatt CMOS voltage reference with 0.046 %/V line sensitivity for a low-power IoT systemHyeongjun Kim, Taegun Yim, Choong Keun Lee, Hongil Yoon. 45-46 [doi]
• Soft Actor-Critic Reinforcement Learning-Based Optimization for Analog Circuit SizingSejin Park, Youngchang Choi, Seokhyeong Kang. 47-48 [doi]
• Temperature Sensor with 292.3 nA/°C Sensitivity Using Double Current SubtractionTzung-Je Lee, Yin-Wen Lo. 49-50 [doi]
• Crosstalk-Based Hardware Trojan In Low Power DesignsYogesh Verma, Mattis Hasler. 51-52 [doi]
• Trust-minimized Integration of Third-Party Intellectual Property CoresFriedrich Pauls, Sebastian Haas, Mattis Hasler. 53-54 [doi]
• Implicit Hardware Trojan: Principles and Enabling MethodsNilanjana Das, Mattis Hasler, Sebastian Haas. 55-56 [doi]
• Investigation for Impact of Environmental Noise on Power Analysis AttacksRyoma Katsube, Tomoaki Ukezono. 57-58 [doi]
• Low Phase Noise Voltage-Controlled Oscillator with Self-Biased Negative-Gm Cell for IoT ApplicationsMinsu Park, Kang-Yoon Lee. 61-62 [doi]
• A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOIHeiner Bauer, Marco Stolba, Stefan Scholze, Dennis Walter, Christian Mayr 0001, Alexander Oefelein, Sebastian Höppner, André Scharfe, Florian Schraut, Holger Eisenreich. 67-68 [doi]
• Low-Power Counters using Pathfinding TechniqueYixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim. 69-70 [doi]
• Mitigating Message Passing Interference in Trusted Embedded PlatformsMattis Hasler, Sebastian Haas. 71-72 [doi]
• Tensor Compressive Sensing Processor for 64x64 Terahertz Single-Pixel ImagingYu-Heng Du, Bing-Feng Wu, Yuan-Hao Huang. 73-74 [doi]
• Leveraging Approximate Computing for IoT Image TransmissionHiroyuki Hama, Tomoaki Ukezono, Toshinori Sato. 75-76 [doi]
• Comparative Evaluation between Carry Prediction and Sign Error Correction in Approximate AdditionToshinori Sato, Hiroyuki Hama, Tomoaki Ukezono. 77-78 [doi]
• Behavior Simulation of CDR for SSC System With a Compact Quarter-Rate Linear Phase DetectorShu-Chi Wang, Ching-Yuan Yang. 79-80 [doi]
• Behavior Simulation of SSC Generator With Adjustable Modulation Frequency and DepthWan-Yu You, Ching-Yuan Yang. 81-82 [doi]
• Adaptive Tag Comparison for Hybrid CacheSeong Jae Eom, Eui-Young Chung. 83-84 [doi]
• Exploring Trustable Paths in Network-on-Chip for Low-Slack PacketsSyam Sankar, Lissiyas Antony, Ruchika Gupta, John Jose, Sukumar Nandi. 85-86 [doi]
• Computation Exactness Exploration of Exact Quantum Adders in NISQHyoju Seo, Seokhyeon Lee, Yongtae Kim. 87-88 [doi]
• A Second-Order DT Delta-Sigma Modulator with Noise-Shaping SAR QuantizerSeong-Bo Park, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Won-Jun Cho, Gil-Cho Ahn. 89-90 [doi]
• A 90-dB DR Discrete-Time Delta-Sigma Modulator for Audio ApplicationsHou-Hsuan Lin, Jia-Fong Shih, Yung-Hui Chung. 91-92 [doi]
• 0.85 mW, 8-bit, 1GS/s, 58dB SFDR Cryogenic DAC for Superconducting Qubit Control ApplicationsChan Kuen Sim, Aarthy Mani, Anh-Tuan Do. 93-94 [doi]
• 10-bit 250-KS/s M-2M Digital-to-Analog Converter with 4-4-2 Segmentation for Sonar SystemTzung-Je Lee, Kuo-Hsun Tu. 95-96 [doi]
• FPGA Implementation of Cycle-Reduced Diagonal Data Flow Systolic Array for Edge Device AIGyubin Seong, Jong Kang Park, Jong-Tae Kim. 99-100 [doi]
• High-throughput PIM (Processing in-Memory) for DRAM using Bank-level Pipelined ArchitectureHyunsoo Lee, Hyundong Lee, Minseung Shin, Gyuri Shin, Sumin Jeon, Taigon Song. 101-102 [doi]
• Heart Valve Disease Recognition Using Phonocardiogram Signal Based on A Lightweight Convolution Neural NetworkYen-Ching Chang, Szu-Ting Wang, Ying-Hsiu Hung, Yao-Feng Liang, Ming-Hwa Sheu, Shin-Chi Lai. 103-105 [doi]
• Comparison of hardware-optimized CNN and SVM models for human activity recognition using the HARTH and HAR 70 + datasetsKei Palabasan, Ramona Rajagopalan, Jean-Marriz Manzano, Marc D. Rosales, Maria Theresa G. de Leon, John Richard E. Hizon. 107-108 [doi]
• A 10-Gb/s Dual-Loop Reference-less CDR with FD ControllerSihan Kim, Changmin Song, Jinseok Kim, Yonghun Oh, Changwan Kim, Young-Chan Jang. 109-110 [doi]
• An Anti-Harmonic-Lock Frequency Detector for Continuous-Rate Clock and Data RecoveryHyun Bin Lee, Won Young Lee. 111-112 [doi]
• A Baud-Rate Clock and Data Recovery With Collaborative Maximum-Eye Tracking MethodJihee Kim, Woo-seok Choi. 113-114 [doi]
• A PAM-4 Baud-Rate CDR with High-Gain Phase Detector Using Shared SamplerSeoung-Geun Cho, Jin-Ku Kang. 115-116 [doi]
• Analysis of Grounded Coplanar Waveguide (GCPW) for High-Speed Links ChannelYoungmin Oh, Taeyang Sim, Jaeduk Han. 117-118 [doi]
• A Compact Q-Learning-Based Standard Cell Layout Compiler for 3nm GAAFET and BeyondMinseung Shin, Jongbeom Kim, Yunjeong Shin, Taigon Song. 119-120 [doi]
• Allocation of Multi-bit Flip-Flops Targeting Low-Power ChipsJinmyoung Kim, Taewhan Kim. 121-122 [doi]
• Maximizing Power Saving Through State-Driven Clock GatingChaehyun Kim, Taewhan Kim. 123-124 [doi]
• Placement Initialization via Community DetectionJunseok Hur, Jaekyung Im, Seokhyeong Kang. 125-126 [doi]
• Design and Analysis of Compound Gates for Lightweight MultiplierJisoo Lee, Daseul Moon, Woohyun Kim, Woong Choi. 127-128 [doi]
• Multi-Phase Frequency Divider Generator with Process-Independent AutomationJihoon Jang, Heedo Jeong, Jaeduk Han. 129-130 [doi]
• Design of Bessel-like filter-based ESD protection I/O pad with improved eye performanceJihyeon Lee, Jaehoon Jeong, Hyungeun Kim, Jinho Jeong. 131-132 [doi]
• A 12-bit 5MS/s Synchronous SAR ADC With Comparator Using High Gain Pre-amplifierYoungwon Cho, Jaehun Jeong, Jinwook Burm. 133-135 [doi]
• A simulation study about the memory operation of 3D-stacked capacitor-less 1T DRAM cells based on ferroelectric field-effect transistors (FeFETs)Taegun Kim, Dong Keun Lee, Sihyun Kim, Sangwan Kim. 135-136 [doi]
• Optimized Image Quality Determination for Backlight DimmingNu Ri Kim, Suk-Ju Kang. 137-138 [doi]
• Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal CircuitsHyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim. 139-140 [doi]
• A Spatio-Temporal Switchable Data Prefetcher for Convolutional Neural NetworksJihoon Jang, Hyun Kim, Hyokeun Lee. 141-142 [doi]
• TD-NAAS: Template-Based Differentiable Neural Architecture Accelerator SearchHaYoung Lim, Yeseo Jang, Juyeon Kim, Jaehyeong Sim. 143-144 [doi]
• The Design of Embedded Fuzzy Logic Controller for Autonomous Mobile RobotsYoung Woo Jeong, Won-Sik Jeong, Jin Young Shin, Seung Eun Lee. 145-146 [doi]
• Hardware-friendly Activation Functions for HybridViT ModelsBeom-Jin Kang, Nam-Joon Kim, Jong-Ho Lee, Hyun Kim. 147-148 [doi]
• Considerations in Evaluation of Deep Hashing Networks for Information Retrieval SystemSubin Kim, Yunseon Choi, Byunghan Lee. 149-150 [doi]
• Experimental Assessment of 1D-DCT Based Display Field Communication SchemeYu-Jeong Kim, Sung-Yoon Jung. 151-153 [doi]
• Pointing error effect in FSO satellite-to-ground under weak turbulence conditionNilesh Maharjan, Byung Wook Kim. 153-154 [doi]
• Inductor-less CMOS TIA Based on MSTA for Low-power and Low-noise Optical CommunicationRen Izumi, Makoto Nakamura, Daisuke Ito. 155-156 [doi]
• Communication Performance Depending on LED Installation Position in Image Sensor Communication Using Propeller LED TransmitterKazuki Shakuda, Zhengqiang Tang, Shintaro Arai. 157-158 [doi]
• Development of Propeller LED Transmitter for High-Speed Image Sensor CommunicationShintaro Arai, Daisuke Ito. 159-160 [doi]
• Bifurcation analysis of a chaotic interrupted system with a periodic thresholdYuta Suzuki, Kaito Kato, Hiroyuki Asahara, Takuji Kousaka. 161-162 [doi]
• Pavlovian Conditioning Modeling Using Wireless Spiking Neural NetworkJiaying Lin, Ryuji Nagazawa, Kien Nguyen 0002, Hiroo Sekiya, Hiroyuki Torikai, Mikio Hasegawa, Won-Joo Hwang. 163-164 [doi]
• Load-Independent Multiple Output WPT System With Fixed Coupling CoilsAkihiro Konishi, Ken Onodera, Yutaro Komiyama, Kien Nguyen 0002, Hiroo Sekiya, Xiuqin Wei. 165-166 [doi]
• Time Series Analysis with Three Types of Noise-Mixing Effects by Neural NetworkTakuya Nakamura, Yoshifumi Nishio, Yoko Uwate. 167-168 [doi]
• A hardware-efficient wireless functional electrical stimulation system based on ergodic cellular automaton dynamicsMasaya Kudo, Hiroyuki Torikai. 169-170 [doi]
• An Automated Toolchain for QUBO-based Optimization with Quantum-inspired AnnealersYun-Ting Zhang, Chin-Fu Nien, Chia-Wei Lin, Wen-Jui Chao, Chen-yu Liu, Lien-Po Yu, Yuan-Ho Chen. 171-172 [doi]
• Hybrid CNN-LSTM Network for ECG Classification and Its Software-Hardware Co-Design ApproachSong-Nien Tang, Yuan-Ho Chen, Yu-wei Chang, Yu-Ting Chen, Shuo-Hung Chou. 173-174 [doi]
• Integrated All-GaN Driver for High-voltage DC-DC Power ConvertersChin Hsia, Chung-Yi Li, Deng-Fong Lu, Tzu-Yu Chen. 175-176 [doi]
• Fast Measurement of Impedance Calculation for Electrochemical Impedance SpectroscopyEn-Chi Yang, Suz-Ting Wang, Kusn-Lin Liu, Wen-Ho Juang, Ming-Hwa Sheu, How-Chiun Wu, Shin-Chi Lai. 177-178 [doi]
• Robust Cascaded Boost Converter with See-Saw Stress-Relief ControlChung-Yi Li, Tzu-Yu Chen, Deng-Fong Lu, Yue-Liang Chou, Hung-Chi Chen, Shinn-Yn Lin. 179-180 [doi]
• Convolutional Neural Network-based Keyword Classification for Mixer ControlYing-Hsiu Hung, Yen-Ching Chang, Suz-Ting Wang, Jeng-Dao Lee, Wen-Ho Juang, Ming-Hwa Sheu, Shin-Chi Lai. 181-182 [doi]
• A Simple Active Transponder for X-band SAR Satellite ApplicationsGianfranco Avitabile, Roberto Cancelli, Antonello Florio, Ka Lok Man, Giuseppe Coviello. 183-184 [doi]
• Lower-Error and Area-Efficient Complex Divider Design using Logarithmic Number Systems (LNS)Tso-Bing Juang, Chun-Chi Fan, Guan-Zhong Lin. 185-186 [doi]
• Quantum Biometric Fingerprint Encryption based on Twofish AlgorithmGabriela Mogos. 187-188 [doi]
• A Capacitor-less LDO for Mobile Devices with Fast Transient Using High Gain Positive Feedback LoopEsun Baik, Hyo-Jin Park, Sung-Wan Hong. 189-190 [doi]
• A 12-bit 3-MS/s Synchronous SAR ADC With a Hybrid RC DACMi-Ji Go, Jun-Ho Boo, Jae-Geun Lim, Hyoung-Jung Kim, Jae-Hyuk Lee, Seong-Bo Park, Byeongho Yu, Won-Jun Cho, Gil-Cho Ahn. 191-192 [doi]
• Bioinspired Solution-processed Artificial Synaptic Thin-Film TransistorJ.-Y. Li, G. X. Sun, C. Zhao, K. L. Man, S. Lam, X. Tu. 193-194 [doi]
• Image Radar Point Cloud Segmentation with Segment Anything ModelYu Du, Jeremy S. Smith, Ka Lok Man, Eng Gee Lim. 195-196 [doi]
• Feature Extraction of Neuron Group Composed of Two Different Firing Patterns Using Nonlinear AnalysisYoko Uwate, Yoshifumi Nishio. 199-200 [doi]
• Memristor Circuits for Non-Backpropagation Training AlgorithmSeokjin Oh, Rina Yoon, Seungmyeong Cho, Kyeong-Sik Min. 201 [doi]
• Energy-Efficient AI at the edge for Biomedical ApplicationsJerald Yoo. 202 [doi]
• Accelerating Transformers with Fourier-Based Attention for Efficient On-Device InferenceHyeonjin Jo, Chaerin Sim, Jaewoo Park, Jongeun Lee. 203-204 [doi]
• A PAM-4 Receiver with Selective Reference Voltage Adaptation for Low Sensitivity to Sampler Voltage VariationsJeong Mi Park, Jin-Ku Kang. 205-206 [doi]
• Improving Performance and Energy-efficiency of DNN Accelerators with STT-RAM BuffersGwangeun Byeon, Seongwook Kim, Seokin Hong. 207-208 [doi]
• Twiddle Factor Generator Architecture for Number Theoretic TransformChulwoo Lee, Hanyoung Lee, Phap Duong-Ngoc, Hanho Lee. 209-210 [doi]
• Optimizing Image Classification with Inverse Depthwise Separable Convolution for Edge DevicesAkshay Kumar Sharma, Kyung Ki Kim. 211-212 [doi]
• DQ and DQS Receiver for HBM3 Memory Interface with DFE Offset CalibrationSujin Park, Young-Deuk Jeon, Yi-Gyeong Kim, Min Hyung Cho, Jinho Han, Jaehoon Chung, Jaewoong Choi, Youngsu Kwon. 215-216 [doi]
• ABSX: The Chiplet Hyperscale AI Processing Unit for Energy-Efficient High-Performance AI ProcessingYoungsu Kwon. 217-218 [doi]
• Signal integrity analysis of heterogeneous integration using Si bridge technologyYong-Nam Koh, Ju-Hyung Kim, Soo-jeong Kim, Ju-Hwan Jang, Jae-Sung Lim, Jayden Donghyun Kim. 221-222 [doi]
• Advancements in Metal Passivation Process for Low-Temperature Cu-Cu Direct BondingPark Jong-Kyung, Park Sang-Woo, Jeong Min-Seong. 223-224 [doi]
• Analyses of nonlinear transient phenomena of ergodic cellular automaton central pattern generatorShoma Sato, Hiroyuki Torikai. 227-228 [doi]
• Synchronization Phenomena of Two Coupled Chaotic Circuits Using Stochastic CouplingTakahiro Hattori, Yoko Uwate, Yoshifumi Nishio. 229-230 [doi]
• A chopper-type mixed gait controller based on ergodic cellular automaton central pattern generatorJumpei Kamitoko, Hiroyuki Torikai. 231-232 [doi]
• Rewiring Effect of High Synchronization Edges in Complex Oscillator NetworksHaruka Sakohira, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio. 233-234 [doi]
• Synchoronization Penomena of Coupled Oscillators in Weighted Three-Dimensional Complex NetworksDaiki Akai, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio. 235-236 [doi]
• Effect of Lateral Connection on Synchronization Phenomena in Chaotic Circuits Coupled with Non-Uniform Coupling StrengthYuki Matsubara, Yuki Ishikawa, Yoko Uwate, Yoshifumi Nishio. 237-238 [doi]
• Lowering the Number of Live-Page Copies on Solid State Drives through Trim-Assisted Space AllocationYong-Cheng Liaw, Shuo-Han Chen, Hsin-Yun Su. 239-240 [doi]
• Exploring Hot/Cold Data Separation for Garbage Collection Efficiency Enhancement on OCSSDsYu-Shiang Tsai, Shuo-Han Chen, Yong-Cheng Liaw, Cheng-Yueh Wu. 241-242 [doi]
• Mitigating Write Amplification of Dual-mode Flash MemoryYi-Shen Chen, Ying-Jui Shih, Jen-Wei Hsieh. 243-244 [doi]
• Alleviating Deduplication-oriented Fragmentation of SSDs by Considering File Hotness and PopularityLee Chang, Chien-Chung Ho, Tei-Wei Kuo. 245-246 [doi]
• Multi-Stripline Redistribution Layer Interposer Channel Design for High Bandwidth Memory Module Considering Via InterconnectJiwon Yoon, Hyunwoo Kim, Boogyo Sim, HyunWook Park, Yi-Gyeong Kim, Sujin Park, Youngsu Kwon, Joungho Kim. 247-248 [doi]
• Adaptive Mode-Switching for Write-amplification Reduction of SMR DisksYi-Syuan Lin, Yu-Pei Liang, Yu-Shan Yen, Yen-Ting Chen, Wei Kuan Shih, Yuan-Hao Chang 0001. 247-248 [doi]
• Alleviating the Impact of Fingerprint Operations on NAND Flash Memory Storage PerformanceYi-Syuan Lin, Chin-Yu Lo, Yi-Chao Shih, Tseng-Yi Chen. 249-250 [doi]
• Synchronizations in Three Coupled Oscillators with Memristor Synapses as Ring StructureYukinojo Kotani, Yoko Uwate, Yoshifumi Nishio. 251-252 [doi]
• A hardware-efficient FPGA cochlear model for next generation nonlinear cochlear implantYui Kishimoto, Hiroyuki Torikai. 253-255 [doi]
• A learnable network of analog electronic neuron models for brain prosthetic implantKengo Hosoi, Hiroyuki Torikai. 255-256 [doi]
• Analysis of predictive coding model with hierarchical reservoir computing for modeling Stroop effectsHaruki Terakawa, Hideyuki Kato, Yoshihiro Yonemura, Yuichi Katori. 257-258 [doi]
• A Study of Changes in Prediction Performance Influenced by Attractor State in Oscillator Reservoir ComputingKazuki Yasufuku, Yoko Uwate, Yoshifumi Nishio. 259-260 [doi]
• A Compact Design of SPAD Detector with Quenching Circuit for Reduced Dark Count RateJaehun Jeong, Jonghyuk Chae, Seungju Lee, Jinwook Burm. 261-262 [doi]
• A 8-bit DPWM-based Analog Bypass Circuit and System for LED Matrix Headlamp in High-Voltage 180-nm CMOS TechnologyJonghyuk Chae, Jaehun Jeong, ByeongHa Park, Jinwook Burm. 263-264 [doi]
• An Analog Integrate-and-Fire Neuron with Robust Soft Reset MechanismJia Park, Woo-seok Choi. 265-266 [doi]
• A 288nV/√Hz low-noise capacitively-coupled instrumentation amplifier (CCIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensorsAdam Jefferson Ramones, Paolo Miguel Villacorta, Kyla Marie Juruena, Trixi Emmanuelle Obar, John Robert Siglos, Jean-Marriz Manzano, Zyrel Renzo Sanchez, Arcel G. Leynes, Maria Sophia Ralota, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon. 267-268 [doi]
• A high CMRR, high input impedance current-feedback instrumentation amplifier (CFIA) in 22-nm UTBB FD-SOI for signal conditioning of MEMS piezoresistive pressure sensorsKyla Marie Juruena, Paolo Miguel Villacorta, Trixi Emmanuelle Obar, John Robert Siglos, Adam Jefferson Ramones, Jean-Marriz Manzano, Zyrel Renzo Sanchez, Arcel G. Leynes, Maria Sophia Ralota, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon. 269-270 [doi]
• A High Input Impedance Low Noise Amplifier Capable Of Handling 1V Electrode Offset for Biopotential RecordingChau-Thao Cao, Pham Hong Bao Ngoc, Loan Pham-Nguyen, Xuan Thanh Pham. 273-274 [doi]
• A 0.4-VIN, External-Capacitor-Free, Adaptive-Biased LDO with Look-Ahead Droop Reduction for Wake-up Features in Edge DevicesHee-Cheol Joo, Hyein Kim, Young Ha Hwang. 275-276 [doi]
• Preliminary Study on Reducing Memory Overhead in Accelerating Quantum Computer Simulations Using PIM TechnologyLeanghok Hour, Myeongseong Go, Youngsun Han. 277-278 [doi]
• FPGA-Controlled High-Power Driving Design for High Intensity Focused Ultrasound ApplicationChun-Mao Chen, Jia-Ching Chuang, Hao-Li Liu. 279-280 [doi]
• Electro-Optical Phase Locked Loop design for FMCW LiDAR TX in 28-nm CMOSEuigeun Kim, Jinwook Burm. 281-282 [doi]
• An Area-Efficient Column Driver with Fully Nonlinear Gamma Scale for Mobile AMOLEDsJaewoong Ahn, Seung Hun Choi, Junyeol An, Hyung-Min Lee. 283-284 [doi]
• Integration of In-Memory Computing Capabilities to a Self-Matching Complementary-Reference Sensing Scheme for TST-MRAMGiussepe Yvanric Galvez, Andrew James Lim, Christopher Jr Camarillo, John Rey Marturillas, Mark Emannuel Teodoro, Ellris Kristian Nuel Urfano, Anastacia B. Alvarez, Ryan Albert G. Antonio, Fredrick Angelo R. Galapon, Sherry Joy Alvionne Baquiran, Allen Jason Tan, Lawrence Roman A. Quizon. 285-286 [doi]
• LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard ArchitectureSunghoon Kim, Donghyun Han, Seokjun Jang, Sungho Kang. 289-290 [doi]
• Modeling Truncation-Based Approximation Error in Stochastic Computing CircuitsKeerthana Pamidimukkala, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 291-292 [doi]
• Improving Performance of Current Sensor Chip Based on Multi-Parameter Compensation : Compensation & Decimation Filter for Digital ChipGo-Eun Woo, Sangbo Park, Hyungwon Kim. 293-294 [doi]
• 1-kS/s 12-bit SAR ADC with Burst ConversionHaewoon Son, WonSeok Yang, Hoyong Jung, Young-Chan Jang. 295-296 [doi]
• First-order Continuous Time Delta-sigma Modulator with 3-bit SAR ADC and PNM DACHye-Min Shin, Hae-Won Son, Tai-Soon Park, Tae-Woo Oh, Young-Chan Jang. 297-298 [doi]
• HVS-based AR Display Image Enhancement With Delta Look-Up Table Considering Ambient LightDongHun Cho, Hyeseong Lee, Jeonghun Lee, Jaehee You. 299-300 [doi]
• SCC: Efficient Error Correction Codes for MLC PCMYujin Lim, Dongwhee Kim, Jungrae Kim. 303-304 [doi]
• Synergistic Integration: An Optimal Combination of On-Die and Rank-Level ECC for Enhanced ReliabilityWonyeong Jung, Dongwhee Kim, Jungrae Kim. 305-306 [doi]
• Design of Wafer Vision Alignment System using Hardware SimulatorJaehyuk So, Dong-hyun Lee. 307-308 [doi]
• CPR: Correlation-based Page RemappingHojung Namkoong, Jungrae Kim. 309-310 [doi]
• A Max Pooling Hardware Architecture Supporting Inference And Training For CNN AcceleratorsSanghyun Kim, Eunchong Lee, Minkyu Lee, KyungHo Kim, Sang-Seol Lee, Sung-Joon Jang. 313-314 [doi]
• A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS TechnologyElim Lee, Youngmin Kim. 315-316 [doi]
• Low-Complexity Phase Shift Design for IRS-Aided SU-MIMO Wireless SystemsJiwon Kim, Seungsik Moon, Youngjoo Lee. 317-318 [doi]
• Continuous Convolution Accelerator with Data Reuse based on Systolic ArchitectureJoungMin Park, SeongMo An, Jinyeol Kim, Seung Eun Lee. 319-320 [doi]
• Energy-Efficient Sparse Hyperdimensional Computing for Speech RecognitionKim Isaac I. Buelagala, Ginzy S. Javier, Sean Alfred A. Lipardo, James Carlo E. Sorsona, Sherry Joy Alvionne S. Baquiran, Lawrence Roman A. Quizon, Allen Jason Tan, Ryan Albert G. Antonio, Fredrick Angelo R. Galapon, Anastacia B. Alvarez. 321-322 [doi]
• Distance Searching-based Hyperparameter Optimization for Restricted Coulomb Energy-based Neural NetworkKyou-Jung Son, Seokhun Jeon, Jae Hack Lee, Byung-Soo Kim. 323-324 [doi]
• Enhancing Performance and Energy Efficiency of Reconfigurable CNN AcceleratorBogeun Jung, Geonhui Jang, Hyungwon Kim. 327-328 [doi]
• Efficient Object Detection through Migration-Based Neural Architecture SearchAmrita Rana, Kyung Ki Kim. 329-330 [doi]
• Reconfigurable Cell-Based Systolic Array Architecture for CNN Training Accelerator for Mobile ApplicationsSang-Bo Park, Dong Yeong Lee, Hyungwon Kim. 331-332 [doi]
• High-Speed FPGA-to-FPGA Interface for a Multi-Chip CNN AcceleratorGitae Park, Thaising Taing, Hyungwon Kim. 333-334 [doi]
• Tcl-based Simulation Platform for Light-weight ResNet ImplementationSeunghyun Park, Dongkyu Lee, Daejin Park. 335-336 [doi]
• Performance Comparison of Clocked Comparators Using Impulse Sensitivity FunctionTaehoon Kim, Woo-seok Choi. 337-338 [doi]
• Redundancy Analysis Simplification Scheme for High-Speed Memory RepairHayoung Lee, Younwoo Yoo, Seung-Ho Shin, Sungho Kang. 339-340 [doi]
• Machine Learning based Scan Chain Diagnosis for Double FaultsHyojoon Yun, Tae-Hyun Kim, Sungho Kang. 341-342 [doi]
• A New Flip-flop Shared Architecture of Test Point Insertion for Scan DesignHyemin Kim, Sangjun Lee, Jongho Park, Sungwhan Park, Sungho Kang. 343-344 [doi]
• Fast Refinement on Placement Legalization for Designs with Mixed-Height CellsKihwan Jeon, Taewhan Kim. 345-346 [doi]
• Optimizing Timing for Multi-bit Flip-Flop Intensive Designs Compatible with Commercial EDA FlowIlseon Ha, Taewhan Kim. 347-348 [doi]
• Advanced Parasitic Capacitance Extraction using Active LearningDonggyu Kim, Jakang Lee, Seokhyeong Kang. 349-350 [doi]
• Design of Energy-Efficient Cryptographically Secure Pseudo-Random Number Generators Using High-Level SynthesisHyeri Roh, Woo-seok Choi. 351-352 [doi]
• Bayesian Optimization for Parameter Tuning in Placement-Aware Logic SynthesisJiwoo Nam, Daijoon Hyun. 353-354 [doi]
• An Analysis of Current-mode Drivers in 40-nm CMOS TechnologyBona Lim, Hanhee Jo, Jaeduk Han. 355-356 [doi]