Gyubin Seong, Jong Kang Park, Jong-Tae Kim. FPGA Implementation of Cycle-Reduced Diagonal Data Flow Systolic Array for Edge Device AI. In 20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023. pages 99-100, IEEE, 2023. [doi]
Abstract is missing.