A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS Technology - researchr publication

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Elim Lee, Youngmin Kim. A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS Technology. In 20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023. pages 315-316, IEEE, 2023. [doi]

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