A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS Technology

Elim Lee, Youngmin Kim. A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS Technology. In 20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023. pages 315-316, IEEE, 2023. [doi]

@inproceedings{LeeK23-53,
  title = {A Power-Efficient 10T D Flip-Flop with Dual Line of Four Switches using 65nm CMOS Technology},
  author = {Elim Lee and Youngmin Kim},
  year = {2023},
  doi = {10.1109/ISOCC59558.2023.10396628},
  url = {https://doi.org/10.1109/ISOCC59558.2023.10396628},
  researchr = {https://researchr.org/publication/LeeK23-53},
  cites = {0},
  citedby = {0},
  pages = {315-316},
  booktitle = {20th International SoC Design Conference, ISOCC 2023, Jeju, Republic of Korea, October 25-28, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-2703-8},
}