Oliver F. Haberl, Thomas Kropf. A methodology for the insertion of a hierarchical and boundary-scan compatible self test. In 10th IEEE VLSI Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic City, NJ, USA. pages 37-42, IEEE, 1992. [doi]
@inproceedings{HaberlK92-0,
title = {A methodology for the insertion of a hierarchical and boundary-scan compatible self test},
author = {Oliver F. Haberl and Thomas Kropf},
year = {1992},
doi = {10.1109/VTEST.1992.232721},
url = {http://dx.doi.org/10.1109/VTEST.1992.232721},
researchr = {https://researchr.org/publication/HaberlK92-0},
cites = {0},
citedby = {0},
pages = {37-42},
booktitle = {10th IEEE VLSI Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic City, NJ, USA},
publisher = {IEEE},
isbn = {0-7803-0623-6},
}