Yuki Hagita, Kiyoshi Ishii. Circuit technique for improving propagation delay times in CMOS source-coupled logic circuits. In International Symposium on Intelligent Signal Processing and Communications Systems, ISPACS 2012, Tamsui, New Taipei City, Taiwan, November 4-7, 2012. pages 615-618, IEEE, 2012. [doi]
@inproceedings{HagitaI12,
title = {Circuit technique for improving propagation delay times in CMOS source-coupled logic circuits},
author = {Yuki Hagita and Kiyoshi Ishii},
year = {2012},
doi = {10.1109/ISPACS.2012.6473563},
url = {http://dx.doi.org/10.1109/ISPACS.2012.6473563},
researchr = {https://researchr.org/publication/HagitaI12},
cites = {0},
citedby = {0},
pages = {615-618},
booktitle = {International Symposium on Intelligent Signal Processing and Communications Systems, ISPACS 2012, Tamsui, New Taipei City, Taiwan, November 4-7, 2012},
publisher = {IEEE},
isbn = {978-1-4673-5083-9},
}