Irina V. Hahanova, Volodymyr Obrizan, Alexander Adamov, Dmitry Shcherbin. Transaction level model of embedded processor for vector-logical analysis. In East-West Design & Test Symposium, EWDTS 2013, Rostov-on-Don, Russia, September 27-30, 2013. pages 1-4, IEEE, 2013. [doi]
Abstract is missing.