A framework for 1-D compaction with forbidden region avoidance [VLSI layout]

Susanne E. Hambrusch, Hung-Yi Tu. A framework for 1-D compaction with forbidden region avoidance [VLSI layout]. In First Great Lakes Symposium on VLSI, 1991, Kalamazoo, MI, USA, March 1-2, 1991. pages 146-151, IEEE, 1991. [doi]

Abstract

Abstract is missing.