A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator

Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec. A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator. In Joseph R. Cavallaro, Tong Zhang 0002, Alex K. Jones, Hai Helen Li, editors, Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014. pages 273-278, ACM, 2014. [doi]

@inproceedings{HammoudaCL14,
  title = {A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator},
  author = {Mohamed Ben Hammouda and Philippe Coussy and Loïc Lagadec},
  year = {2014},
  doi = {10.1145/2591513.2591521},
  url = {http://doi.acm.org/10.1145/2591513.2591521},
  researchr = {https://researchr.org/publication/HammoudaCL14},
  cites = {0},
  citedby = {0},
  pages = {273-278},
  booktitle = {Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014},
  editor = {Joseph R. Cavallaro and Tong Zhang 0002 and Alex K. Jones and Hai Helen Li},
  publisher = {ACM},
  isbn = {978-1-4503-2816-6},
}