Circuit-level techniques to control gate leakage for sub-100nm CMOS

Fatih Hamzaoglu, Mircea R. Stan. Circuit-level techniques to control gate leakage for sub-100nm CMOS. In Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet, editors, Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002. pages 60-63, ACM, 2002. [doi]

@inproceedings{HamzaogluS02,
  title = {Circuit-level techniques to control gate leakage for sub-100nm CMOS},
  author = {Fatih Hamzaoglu and Mircea R. Stan},
  year = {2002},
  doi = {10.1145/566408.566425},
  url = {http://doi.acm.org/10.1145/566408.566425},
  researchr = {https://researchr.org/publication/HamzaogluS02},
  cites = {0},
  citedby = {0},
  pages = {60-63},
  booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002},
  editor = {Vivek De and Mary Jane Irwin and Ingrid Verbauwhede and Christian Piguet},
  publisher = {ACM},
  isbn = {1-58113-475-4},
}