Yuanyuan Han, Xu Cheng 0002, Xiaoyong Xue, Jun Han 0003, Jiawei Xu 0001, Xiaoyang Zeng. SET Tolerable SRAM Hardened by DMR Circuit With Feedback-Split-Gate Voter and High-Speed Hierarchical Structure. IEEE Trans. Circuits Syst. II Express Briefs, 71(3):1416-1420, March 2024. [doi]
Abstract is missing.