A 17.28-Gb/s Transceiver With Hybrid Phase-Interpolated Clock and Data Recovery in 40-nm CMOS - researchr publication authors

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Shuo Han, Sheng-You Liu, Kai-Hung Chou, Min-Shu Shih, Ping-Heng Wu, Ching-Yuan Yang. A 17.28-Gb/s Transceiver With Hybrid Phase-Interpolated Clock and Data Recovery in 40-nm CMOS. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 100-104, IEEE, 2026. [doi]

This author has not been identified. Look up 'Shuo Han' in GoogleThis author has not been identified. Look up 'Sheng-You Liu' in GoogleThis author has not been identified. Look up 'Kai-Hung Chou' in GoogleThis author has not been identified. Look up 'Min-Shu Shih' in GoogleThis author has not been identified. Look up 'Ping-Heng Wu' in GoogleThis author has not been identified. Look up 'Ching-Yuan Yang' in Google

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