Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration

Jinchi Han, Zhidong Wang, Hao Ma, Wei Song 0002. Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration. Int. J. Software and Informatics, 15(3):329-348, 2025. [doi]

Authors

Jinchi Han

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Zhidong Wang

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Hao Ma

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Wei Song 0002

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