Jinchi Han, Zhidong Wang, Hao Ma, Wei Song 0002. Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration. Int. J. Software and Informatics, 15(3):329-348, 2025. [doi]
@article{HanWMS25,
title = {Spike-FlexiCAS: RISC-V Processor Simulator Supporting Flexible Cache Architecture Configuration},
author = {Jinchi Han and Zhidong Wang and Hao Ma and Wei Song 0002},
year = {2025},
doi = {10.21655/ijsi.1673-7288.00352},
url = {https://doi.org/10.21655/ijsi.1673-7288.00352},
researchr = {https://researchr.org/publication/HanWMS25},
cites = {0},
citedby = {0},
journal = {Int. J. Software and Informatics},
volume = {15},
number = {3},
pages = {329-348},
}