F. Keith Hanna. Automatic Verification of Mixed-Level Logic Circuits. In Ganesh Gopalakrishnan, Phillip J. Windley, editors, Formal Methods in Computer-Aided Design, Second International Conference, FMCAD 98, Palo Alto, California, USA, November 4-6, 1998, Proceedings. Volume 1522 of Lecture Notes in Computer Science, pages 133-166, Springer, 1998. [doi]
@inproceedings{Hanna98:0,
title = {Automatic Verification of Mixed-Level Logic Circuits},
author = {F. Keith Hanna},
year = {1998},
url = {http://link.springer.de/link/service/series/0558/bibs/1522/15220133.htm},
tags = {logic},
researchr = {https://researchr.org/publication/Hanna98%3A0},
cites = {0},
citedby = {0},
pages = {133-166},
booktitle = {Formal Methods in Computer-Aided Design, Second International Conference, FMCAD 98, Palo Alto, California, USA, November 4-6, 1998, Proceedings},
editor = {Ganesh Gopalakrishnan and Phillip J. Windley},
volume = {1522},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-65191-8},
}