Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay Information - researchr publication authors

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Takahiro Hanyu, Yuma Watanabe, Atsushi Matsumoto. Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay Information. In 43rd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2013, Toyama, Japan, May 22-24, 2013. pages 266-271, IEEE, 2013. [doi]

This author has not been identified. Look up 'Takahiro Hanyu' in GoogleThis author has not been identified. Look up 'Yuma Watanabe' in GoogleThis author has not been identified. Look up 'Atsushi Matsumoto' in Google

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