Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay Information

Takahiro Hanyu, Yuma Watanabe, Atsushi Matsumoto. Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay Information. In 43rd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2013, Toyama, Japan, May 22-24, 2013. pages 266-271, IEEE, 2013. [doi]

Abstract

Abstract is missing.