FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture

Masanori Hariyama, Yasuhiro Kobayashi, Haruka Sasaki, Michitaka Kameyama. FPGA Implementation of a Stereo Matching Processor Based on Window-Parallel-and-Pixel-Parallel Architecture. IEICE Transactions, 88-A(12):3516-3522, 2005. [doi]

Abstract

Abstract is missing.