A low-error, memory-based fast binary antilogarithmic converter

L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visweswara Rao Samoju, Sreehari Veeramachaneni, Noor Mohammad S.. A low-error, memory-based fast binary antilogarithmic converter. I. J. Circuit Theory and Applications, 49(7):2214-2226, 2021. [doi]

Authors

L. Guna Sekhar Sai Harsha

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Bhaskara Rao Jammu

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Visweswara Rao Samoju

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Sreehari Veeramachaneni

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Noor Mohammad S.

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