L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visweswara Rao Samoju, Sreehari Veeramachaneni, Noor Mohammad S.. A low-error, memory-based fast binary antilogarithmic converter. I. J. Circuit Theory and Applications, 49(7):2214-2226, 2021. [doi]
@article{HarshaJSVS21, title = {A low-error, memory-based fast binary antilogarithmic converter}, author = {L. Guna Sekhar Sai Harsha and Bhaskara Rao Jammu and Visweswara Rao Samoju and Sreehari Veeramachaneni and Noor Mohammad S.}, year = {2021}, doi = {10.1002/cta.2981}, url = {https://doi.org/10.1002/cta.2981}, researchr = {https://researchr.org/publication/HarshaJSVS21}, cites = {0}, citedby = {0}, journal = {I. J. Circuit Theory and Applications}, volume = {49}, number = {7}, pages = {2214-2226}, }