Area efficient soft error tolerant RISC pipeline: Leveraging data encoding and inherent ALU redundancy

Syed Rafay Hasan, Phani Tangellapalli. Area efficient soft error tolerant RISC pipeline: Leveraging data encoding and inherent ALU redundancy. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 699-702, IEEE, 2017. [doi]

Abstract

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