Kaoru Hashimoto, Yasuaki Ito, Koji Nakano. Template Matching Using DSP Slices on the FPGA. In Juan E. Guerrero, editor, The First International Symposium on Computing and Networking - Across Practical Development and Theoretical Research, Dogo SPA Resort, Matsuyama, Japan, December 4-6, 2013. pages 338-344, IEEE Computer Society, 2013. [doi]
Abstract is missing.