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Yutaka Hata, Kiyoshi Hayase, Takahiro Hozumi, Naotake Kamiura, Kazuharu Yamato. Multiple-Valued Logic Minimization by Genetic Algorithms. In ISMVL. pages 97-102, 1997. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: The Output Permutation for the Multiple-Valued Logic Minimization with Universal LiteralsTakahiro Hozumi, Osamu Kakusho, Yutaka Hata. ismvl 1999: 105-109 [doi] Gate Model Networks for Minimization of Multiple-Valued Logic FunctionsYutaka Hata, Takahiro Hozumi, Kazuharu Yamato. ismvl 1993: 29-34
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