A 256-Mb SDRAM using a register-controlled digital DLL

Atsushi Hatakeyama, Hirohiko Mochizuki, Tadao Aikawa, Masato Takita, Yuki Ishii, Hironobu Tsuboi, Shin-ya Fujioka, Shusaku Yamaguchi, Makoto Koga, Yuji Serizawa, Koichi Nishimura, Kuninori Kawabata, Yoshinori Okajima, Michiari Kawano, Hideyuki Kojima, Kazuhiro Mizutani, Toru Anezaki, Masatomo Hasegawa, Masao Taguchi. A 256-Mb SDRAM using a register-controlled digital DLL. J. Solid-State Circuits, 32(11):1728-1734, 1997. [doi]

@article{HatakeyamaMATIT97,
  title = {A 256-Mb SDRAM using a register-controlled digital DLL},
  author = {Atsushi Hatakeyama and Hirohiko Mochizuki and Tadao Aikawa and Masato Takita and Yuki Ishii and Hironobu Tsuboi and Shin-ya Fujioka and Shusaku Yamaguchi and Makoto Koga and Yuji Serizawa and Koichi Nishimura and Kuninori Kawabata and Yoshinori Okajima and Michiari Kawano and Hideyuki Kojima and Kazuhiro Mizutani and Toru Anezaki and Masatomo Hasegawa and Masao Taguchi},
  year = {1997},
  doi = {10.1109/4.641693},
  url = {https://doi.org/10.1109/4.641693},
  researchr = {https://researchr.org/publication/HatakeyamaMATIT97},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {32},
  number = {11},
  pages = {1728-1734},
}