Placement Security Analysis for Side-Channel Resistant Dual-Rail Scheme in FPGA

Wei He, Alexander Herrmann. Placement Security Analysis for Side-Channel Resistant Dual-Rail Scheme in FPGA. In Andy D. Pimentel, Stephan Wong, Gerardo Pelosi, Israel Koren, Giovanni Agosta, Alessandro Barenghi, editors, Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2015, Amsterdam, Netherlands, January 19-21, 2015. pages 39, ACM, 2015. [doi]

Abstract

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