Dual-rail active protection system against side-channel analysis in FPGAs

Wei He, Dirmanto Jap. Dual-rail active protection system against side-channel analysis in FPGAs. In 26th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2015, Toronto, ON, Canada, July 27-29, 2015. pages 64-65, IEEE, 2015. [doi]

@inproceedings{HeJ15,
  title = {Dual-rail active protection system against side-channel analysis in FPGAs},
  author = {Wei He and Dirmanto Jap},
  year = {2015},
  doi = {10.1109/ASAP.2015.7245707},
  url = {http://dx.doi.org/10.1109/ASAP.2015.7245707},
  researchr = {https://researchr.org/publication/HeJ15},
  cites = {0},
  citedby = {0},
  pages = {64-65},
  booktitle = {26th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2015, Toronto, ON, Canada, July 27-29, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-1925-3},
}