Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up

M. Heer, V. Dubec, Scrgey Bychikhin, Dionyz Pogany, E. Gornik, M. Frank, A. Konrad, J. Schulz. Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up. Microelectronics Reliability, 46(9-11):1591-1596, 2006. [doi]

@article{HeerDBPGFKS06,
  title = {Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up},
  author = {M. Heer and V. Dubec and Scrgey Bychikhin and Dionyz Pogany and E. Gornik and M. Frank and A. Konrad and J. Schulz},
  year = {2006},
  doi = {10.1016/j.microrel.2006.07.040},
  url = {http://dx.doi.org/10.1016/j.microrel.2006.07.040},
  tags = {analysis, e-science},
  researchr = {https://researchr.org/publication/HeerDBPGFKS06},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Reliability},
  volume = {46},
  number = {9-11},
  pages = {1591-1596},
}