Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique

Antonin Hermanek, Michal Kunes, Milan Tichý. Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique. In International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy. pages 336-339, IEEE, 2010. [doi]

Abstract

Abstract is missing.