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Parallelized Placement Tools for Printed Circuit Board Design

H. Herrmann, Vesselin Jossifov, I. Koepp, W. Schade. Parallelized Placement Tools for Printed Circuit Board Design. In Chris R. Jesshope, Vesselin Jossifov, Wolfgang Wilhelmi, editors, Parcella 1994, VI. International Workshop on Parallel Processing by Cellular Automata and Arrays, Potsdam, September 21-23, 1994. Proceedings. Volume 81 of Mathematical Research, pages 325-334, Akademie Verlag, Berlin, 1994.

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