Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits

Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu. Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits. In 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand. pages 431-433, IEEE Computer Society, 2002. [doi]

Abstract

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