Pao-Pao Ho, Chiao-En Chen, Yuan-Hao Huang. Low-Latency Lattice-Reduction-Aided One-Bit Precoding Processor for 64-QAM 4×64 MU-MIMO Systems. IEEE Open J. Circuits Syst., 2:472-484, 2021. [doi]
@article{HoCH21,
title = {Low-Latency Lattice-Reduction-Aided One-Bit Precoding Processor for 64-QAM 4×64 MU-MIMO Systems},
author = {Pao-Pao Ho and Chiao-En Chen and Yuan-Hao Huang},
year = {2021},
doi = {10.1109/OJCAS.2021.3087482},
url = {https://doi.org/10.1109/OJCAS.2021.3087482},
researchr = {https://researchr.org/publication/HoCH21},
cites = {0},
citedby = {0},
journal = {IEEE Open J. Circuits Syst.},
volume = {2},
pages = {472-484},
}