Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Ranjini Nagaraju, Zachary Marzec, Preeti Agarwal, Chris Frericks, Ryan Cofell, Karthikeyan Sankaralingam. Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. In 2015 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2015, Philadelphia, PA, USA, March 29-31, 2015. pages 203-214, IEEE Computer Society, 2015. [doi]

This author has not been identified. Look up 'Chen-Han Ho' in GoogleThis author has not been identified. Look up 'Venkatraman Govindaraju' in GoogleThis author has not been identified. Look up 'Tony Nowatzki' in GoogleThis author has not been identified. Look up 'Ranjini Nagaraju' in GoogleThis author has not been identified. Look up 'Zachary Marzec' in GoogleThis author has not been identified. Look up 'Preeti Agarwal' in GoogleThis author has not been identified. Look up 'Chris Frericks' in GoogleThis author has not been identified. Look up 'Ryan Cofell' in GoogleThis author has not been identified. Look up 'Karthikeyan Sankaralingam' in Google

runs on WebDSL