Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation

Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Ranjini Nagaraju, Zachary Marzec, Preeti Agarwal, Chris Frericks, Ryan Cofell, Karthikeyan Sankaralingam. Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. In 2015 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2015, Philadelphia, PA, USA, March 29-31, 2015. pages 203-214, IEEE Computer Society, 2015. [doi]

@inproceedings{HoGNNMAFCS15,
  title = {Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation},
  author = {Chen-Han Ho and Venkatraman Govindaraju and Tony Nowatzki and Ranjini Nagaraju and Zachary Marzec and Preeti Agarwal and Chris Frericks and Ryan Cofell and Karthikeyan Sankaralingam},
  year = {2015},
  doi = {10.1109/ISPASS.2015.7095806},
  url = {http://dx.doi.org/10.1109/ISPASS.2015.7095806},
  researchr = {https://researchr.org/publication/HoGNNMAFCS15},
  cites = {0},
  citedby = {0},
  pages = {203-214},
  booktitle = {2015 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2015, Philadelphia, PA, USA, March 29-31, 2015},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4799-1957-4},
}