The following publications are possibly variants of this publication:
- A systematic approach for analyzing fast addition algorithms using counter tree diagramsNaofumi Homma, Jun Sakiyama, Taihei Wakamatsu, Takafumi Aoki, Tatsuo Higuchi. iscas 2004: 197-200
- Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued LogicNaofumi Homma, Takafumi Aoki, Tatsuo Higuchi. ieicet, 89-C(11):1645-1654, 2006. [doi]
- Systematic Approach to Designing Multiple-Valued Arithmetic Circuits Based on Arithmetic Description LanguageNaofumi Homma, Yuki Watanabe, Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi. mvl, 15(4):329-340, 2009. [doi]