VLSI architecture based on packet data transfer scheme and its application

Yuya Homma, Michitaka Kameyama, Yoshichika Fujioka, Nobuhiro Tomabechi. VLSI architecture based on packet data transfer scheme and its application. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1786-1789, IEEE, 2005. [doi]

@inproceedings{HommaKFT05,
  title = {VLSI architecture based on packet data transfer scheme and its application},
  author = {Yuya Homma and Michitaka Kameyama and Yoshichika Fujioka and Nobuhiro Tomabechi},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464955},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464955},
  tags = {rule-based, architecture, data-flow},
  researchr = {https://researchr.org/publication/HommaKFT05},
  cites = {0},
  citedby = {0},
  pages = {1786-1789},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}