7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin

Sung-Wan Hong, Gyu-Hyeong Cho. 7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 296, IEEE, 2015. [doi]

Abstract

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