High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform

Hui Hou, Wei Cao, Fan-jiong Zhang, Jinmei Lai, Jiarong Tong. High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transform. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 486-489, IEEE, 2008. [doi]

Authors

Hui Hou

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Wei Cao

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Fan-jiong Zhang

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Jinmei Lai

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Jiarong Tong

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