A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS

Jason Howard, Saurabh Dighe, Yatin Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson. A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 108-109, IEEE, 2010. [doi]

Authors

Jason Howard

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Saurabh Dighe

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Yatin Hoskote

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Sriram R. Vangal

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David Finan

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Gregory Ruhl

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David Jenkins

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Howard Wilson

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Nitin Borkar

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Gerhard Schrom

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Fabric Pailet

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Shailendra Jain

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Tiju Jacob

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Satish Yada

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Sraven Marella

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Praveen Salihundam

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Vasantha Erraguntla

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Michael Konow

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Michael Riepen

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Guido Droege

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Joerg Lindemann

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Matthias Gries

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Thomas Apel

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Kersten Henriss

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Tor Lund-Larsen

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Sebastian Steibl

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Shekhar Borkar

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Vivek De

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Rob F. Van der Wijngaart

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Timothy G. Mattson

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