A High Speed Multi -Input Comparator with Clocking-Charge Based for Low-Power Systems - researchr publication authors

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Shih-Chang Hsia. A High Speed Multi -Input Comparator with Clocking-Charge Based for Low-Power Systems. In Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 03), 30 June - 2 July 2003, Calgary, Alberta, Canada. pages 130-133, IEEE Computer Society, 2003. [doi]

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