A 0.3V 0.705fJ/conversion-step 10-bit SAR ADC with shifted monotonie switching scheme in 90nm CMOS

Sung-En Hsieh, Chih-Cheng Hsieh. A 0.3V 0.705fJ/conversion-step 10-bit SAR ADC with shifted monotonie switching scheme in 90nm CMOS. In IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016. pages 2899, IEEE, 2016. [doi]

@inproceedings{HsiehH16-1,
  title = {A 0.3V 0.705fJ/conversion-step 10-bit SAR ADC with shifted monotonie switching scheme in 90nm CMOS},
  author = {Sung-En Hsieh and Chih-Cheng Hsieh},
  year = {2016},
  doi = {10.1109/ISCAS.2016.7539202},
  url = {http://dx.doi.org/10.1109/ISCAS.2016.7539202},
  researchr = {https://researchr.org/publication/HsiehH16-1},
  cites = {0},
  citedby = {0},
  pages = {2899},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016},
  publisher = {IEEE},
  isbn = {978-1-4799-5341-7},
}